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- W4224286950 abstract "The paper presents the results of researching and developing methods accelerating a self-timed unit that performs a fused multiply-add-subtract operation under three operands following the IEEE754 standard. The paper proposes a normalization order of the sum and difference speculative estimation when using ternary self-timed coding. This estimation uses a difference of the 24 most significant bits of the product and the third aligned operand for counting leading zeroes. This technique provides a 20% reduction in complexity when implementing the shifter in the normalization block. The analysis shows that the developed methods accelerate the normalization stage by an average of 32% on the statistical set of the input operands." @default.
- W4224286950 created "2022-04-26" @default.
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- W4224286950 date "2022-01-25" @default.
- W4224286950 modified "2023-09-26" @default.
- W4224286950 title "Self-timed Fused Multiply-add Unit Performance Improvement" @default.
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- W4224286950 doi "https://doi.org/10.1109/elconrus54750.2022.9755720" @default.
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