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- W4225332056 abstract "Ferroelectric FET (FeFET) emerges as a highly promising candidate for in-memory computing due to its outstanding performance, superior energy efficiency and great scalability. For FeFET, generally the memory window, i.e., the separation between the two threshold voltage (V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> ) states, is of interest. The absolute value of the low-V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> and high-V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> states are generally not scrutinized. However, in this work, we demonstrate that a proper engineering of V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> is necessary to ensure correct array operation for in-memory computing applications. We highlight that for all the current-based operations, it is necessary to keep both the V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> states positive to cut off the leakage for grounded unselected cells. To reach that design target, we systematically evaluate various design options for V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> engineering, including the gate metal work function, the body bias, and the buried oxide thickness, in a fully-depleted silicon-on-insulator (FDSOI) FeFET using calibrated TCAD simulations. We establish the design guidelines for V <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>TH</inf> engineering to ensure successful operation of in-memory computing applications." @default.
- W4225332056 created "2022-05-05" @default.
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- W4225332056 date "2022-03-01" @default.
- W4225332056 modified "2023-10-15" @default.
- W4225332056 title "Ferroelectric FET Threshold Voltage Optimization for Reliable In-Memory Computing" @default.
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- W4225332056 doi "https://doi.org/10.1109/irps48227.2022.9764551" @default.
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