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- W4237569107 abstract "This paper presents a pedagogical processor model, intended for teaching fundamental concepts about von Neumann machines. A general discussion of the desirable pedagogical properties is given, and a specific one address machine is defined. The machine has a simple architecture, supports four addressing modes, and uses a small number of hierarchically organized, fixed-field instructions. Debugging capabilities are included in the definition and can be accessed by executable instruction." @default.
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- W4237569107 date "1983-02-01" @default.
- W4237569107 modified "2023-10-17" @default.
- W4237569107 title "A pedagogical processor model" @default.
- W4237569107 cites W1998023171 @default.
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- W4237569107 doi "https://doi.org/10.1145/952978.801038" @default.
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