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- W4248156787 abstract "Testing may be more expensive for EPROMs than for other memories, because program and erasure cycles are much longer than read cycles, and therefore the test procedure must not include more than one program and one erasure step.In this paper EPROM operation is modeled by a sequential machine whose state and output equations are derived according to boolean matrix algebra.The choice and the effectiveness of the patterns used to fill the memory are discussed, with reference to appropriate fault models. Two kinds of faults are considered: “stuck-at” bits in the memory matrix and “symmetric decoder faults”, i.e. faults which cause the same behaviour during READ and PROGRAM operations.The nature of the faults which may escape the proposed sequence of test patterns is determined by analytical considerations, and qualitative results on fault detection effectiveness are obtained by Monte Carlo simulations." @default.
- W4248156787 created "2022-05-12" @default.
- W4248156787 date "1981-07-01" @default.
- W4248156787 modified "2023-09-25" @default.
- W4248156787 title "Texas and Intel lower 64k EPROM prices" @default.
- W4248156787 doi "https://doi.org/10.1016/0141-9331(81)90651-7" @default.
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