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- W4249211602 abstract "As FPGA architecture evolves, complex heterogenous blocks, such as RAMs and DSPs, are widely used to effectively implement various circuit applications. These complex blocks often consist of datapath-intensive circuits, which are not adequately addressed in existing packing and placement algorithms. Besides, scalability has become a first-order metric for modern FPGA design, mainly due to the dramatically increasing design complexity. This paper presents efficient and effective packing and analytical placement algorithms for large-scale heterogeneous FPGAs to deal with issues on heterogeneity, datapath regularity, and scalability. Compared to the well-known academic tool VPR, experimental results show that our packing and placement algorithms achieve respective 199.80X and 3.07X speedups with better wirelength, and our overall flow achieves 50% shorter wirelength, with an 18.30X overall speedup." @default.
- W4249211602 created "2022-05-12" @default.
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- W4249211602 date "2014-11-01" @default.
- W4249211602 modified "2023-09-28" @default.
- W4249211602 title "Efficient and effective packing and analytical placement for large-scale heterogeneous FPGAs" @default.
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- W4249211602 doi "https://doi.org/10.1109/iccad.2014.7001421" @default.
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