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- W4251823888 abstract "The development of a microprocessor-based general-purpose interface bus (GP-IB) decoder is presented in this paper. This decoder has been designed to provide up to 144 transistor- transistor logic (TTL) outout lines. It is programmable and driven by the GP-IB/IEEE-488 interface of the controller. A Z80 microprocessor with its associated circuitry has been used to develop this decoder and thus it has got features associated with the microprocessor-based system designs. The GPIB/IEEE-488 listener interface has been incorporated in the design. All functions performed by a decoder have been implemented by software developed in Z80 assembly language, which is stored in an EPROM. The EPROM-based firmware controls all the activities of the system. This decoder unit can be used for the switching matrix of any GP-IB-based automatic test system. It also eliminates the need for a digital I/O card in the controller." @default.
- W4251823888 created "2022-05-12" @default.
- W4251823888 date "1982-03-01" @default.
- W4251823888 modified "2023-10-01" @default.
- W4251823888 title "Designing CMOS memory systems" @default.
- W4251823888 doi "https://doi.org/10.1016/0141-9331(82)90655-x" @default.
- W4251823888 hasPublicationYear "1982" @default.
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