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• W4285146768 abstract "A low-noise fast-transient-response second-order delta-sigma-modulation buck converter with hysteresis-voltage-controlled techniques is proposed. With the proposed control approach, the transient time can be accelerated by roughly 60%. The rail-to-rail OTA generates a current I_Sense, which replicates the inductor current I_L with K times. As ISense flows through the capacitor C_Sense, it will be converted into VSense. Then, the hysteresis-voltage-controlled (HVC) circuit compares the two terminal voltages of hysteresis comparator to detect the overshoot and undershoot of V_Sense. Once V_Sense is detected, the output signal of HVC circuits becomes opposite to the previous state to conduct M_P and M_N previously. Besides, the 2^nd-order delta-sigma-modulation (DSM) circuit plays a vital role of mitigating noise-interference and elevating noise in whole circuits. The proposed converter has been fabricated in TSMC 0.18&#x03BC;m 1P6M CMOS processes with an active area of 1.19&#x00D7;1.09mm². The measured results show the transient time are 3.5&#x03BC;s and 3.2&#x03BC;s, respectively, when the load current changes between 500mA and 100mA. On the basic of the measured results of fast-fourier-transform (FFT), the value of output-to-noise ratio (ONR) is 76.6dB at the sampling frequency of 10MHz. The peak conversion efficiency is 92.1% while the load current is 300mA." @default.
• W4285146768 created "2022-07-14" @default.
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• W4285146768 date "2022-01-01" @default.
• W4285146768 modified "2023-10-05" @default.
• W4285146768 title "A Low-Noise Fast-Transient-Response Delta-Sigma-Modulation Buck Converter with Hysteresis-Voltage-Controlled Techniques" @default.
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• W4285146768 doi "https://doi.org/10.1109/access.2022.3183028" @default.
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