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• W4285170000 abstract "This brief proposes a 3-stage dual-branch charge pump (CP) with an advanced dynamic gate-biasing technique (DGB) enabling ultra-low-voltage (0.1 V) energy harvesting. Specifically, we reduce the forward conduction loss and the reverse current leakage loss with the combination of an advanced DGB and an NMOS-PMOS dual-switch transistor pair. Also, we investigate the relationship between the pumping capacitance and the power conversion efficiency (PCE) of the CP, thus guiding the PCE improvement with minimal capacitance. The prototype fabricated in 65-nm CMOS achieves a 43.4% PCE at a 0.1-V input voltage." @default.
• W4285170000 created "2022-07-14" @default.
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• W4285170000 date "2022-09-01" @default.
• W4285170000 modified "2023-09-30" @default.
• W4285170000 title "A 0.1-V V_IN Subthreshold 3-Stage Dual-Branch Charge Pump With 43.4% Peak Power Conversion Efficiency Using Advanced Dynamic Gate-Bias" @default.
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• W4285170000 doi "https://doi.org/10.1109/tcsii.2022.3182344" @default.
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