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- W4290471431 abstract "This paper presents a differential receiver with input signals of swing up to 2× VDD using 1× VDD devices. The receiver supports input signals with common-mode range of 0.8 V to 2.5 V with an input sensitivity of 200 mV. The circuit is implemented with dynamically varying gate voltage to reduce electrical overstress issues for devices. The source follower configuration is used to reduce the input signal swing and common-mode range to the device tolerable limit without altering the characteristics of the input signals. The reduced signal is converted to the digital output of 1× VDD level using the standard differential receiver. The complete design is implemented with 1.8 V thick gate devices to support 3.3 V signaling in 16 nm FinFET process of Intel Corporation." @default.
- W4290471431 created "2022-08-08" @default.
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- W4290471431 date "2022-11-01" @default.
- W4290471431 modified "2023-10-18" @default.
- W4290471431 title "Differential receiver with 2 × VDD input signals using 1 × VDD devices" @default.
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- W4290471431 doi "https://doi.org/10.1016/j.vlsi.2022.08.003" @default.
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