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- W4294970036 endingPage "42" @default.
- W4294970036 startingPage "32" @default.
- W4294970036 abstract "Many applications, such as integrated circuit based digital signal processors (DSPs) and arithmetic logical units (ALUs), rely on adders and subtractors, which are fundamental blocks. Traditional adders and subtractors were created using complementary metal oxide semi-conductor (CMOS) and field effect transistor (FET) technologies, which have increased the number of transistors, path delays, and power consumption. Therefore, this article focuses on the implementation of hybrid adders and subtractors utilizing FinFET and graphene nano-ribbon FET (GnrFET) based nanotechnologies. Initially, a multiplexer logic-based carry output predictable full adder (COPFA) is developed with a fast selection of carry-outputs, which significantly reduces the delays generated in sum estimation. Then, a path selectable reconfigurable hybrid adder (PSRHA) is developed by selecting the high-speed and low-speed carry propagation paths through the COPFA module. Further, a path selectable reconfigurable hybrid subtractor (PSRHS) also developed using two-complement PSRHA addition. Finally, a single architecture for both addition and subtraction are achieved through a joint reconfigurable hybrid adder and subtractor (JRHAS). From the simulations, the COPFA module resulted in a propagation delay (PD) of 7.2792 ns, static power consumption (SPC) of 2.4369nw, and total energy consumption (TEC) of 0.9077 nJ, while the PSRHA module resulted in PD of 2.45317 ns, SPC of 2.55681nw, TEC of 0.0912 nJ. In addition, the PSRHS module resulted in PD as 2.5297 ns, SPC as 2.8428nw, TEC as 0.0662 nJ, and the JRHAS module resulted in PD as 17.178 ns, SPC as 5.4036nw, TEC as 2.0543 nJ. Overall simulations revealed that the proposed COPFA, PSRHA, PSRHS, and JRHAS resulted in optimal performance as compared to conventional methods in terms of power, delay, and energy metrics." @default.
- W4294970036 created "2022-09-08" @default.
- W4294970036 creator A5057650731 @default.
- W4294970036 creator A5074421761 @default.
- W4294970036 date "2023-01-01" @default.
- W4294970036 modified "2023-10-14" @default.
- W4294970036 title "Design of joint reconfigurable hybrid adder and subtractor using FinFET and GnrFET technologies" @default.
- W4294970036 cites W2916828022 @default.
- W4294970036 cites W2919858756 @default.
- W4294970036 cites W2968191673 @default.
- W4294970036 cites W3024226078 @default.
- W4294970036 cites W3082827302 @default.
- W4294970036 cites W3091371332 @default.
- W4294970036 cites W3115822231 @default.
- W4294970036 cites W3118701153 @default.
- W4294970036 cites W3132793982 @default.
- W4294970036 cites W3152987936 @default.
- W4294970036 cites W3155588663 @default.
- W4294970036 cites W3157645855 @default.
- W4294970036 cites W3167335307 @default.
- W4294970036 cites W3186357284 @default.
- W4294970036 cites W3196238133 @default.
- W4294970036 cites W3209940771 @default.
- W4294970036 cites W3210223152 @default.
- W4294970036 cites W3216927112 @default.
- W4294970036 cites W4210399423 @default.
- W4294970036 cites W4224674582 @default.
- W4294970036 cites W4283768220 @default.
- W4294970036 doi "https://doi.org/10.1016/j.vlsi.2022.09.002" @default.
- W4294970036 hasPublicationYear "2023" @default.
- W4294970036 type Work @default.
- W4294970036 citedByCount "1" @default.
- W4294970036 countsByYear W42949700362023 @default.
- W4294970036 crossrefType "journal-article" @default.
- W4294970036 hasAuthorship W4294970036A5057650731 @default.
- W4294970036 hasAuthorship W4294970036A5074421761 @default.
- W4294970036 hasConcept C116206932 @default.
- W4294970036 hasConcept C127413603 @default.
- W4294970036 hasConcept C164620267 @default.
- W4294970036 hasConcept C173608175 @default.
- W4294970036 hasConcept C187805909 @default.
- W4294970036 hasConcept C19275194 @default.
- W4294970036 hasConcept C24326235 @default.
- W4294970036 hasConcept C3227080 @default.
- W4294970036 hasConcept C41008148 @default.
- W4294970036 hasConcept C41112130 @default.
- W4294970036 hasConcept C46362747 @default.
- W4294970036 hasConcept C70970002 @default.
- W4294970036 hasConceptScore W4294970036C116206932 @default.
- W4294970036 hasConceptScore W4294970036C127413603 @default.
- W4294970036 hasConceptScore W4294970036C164620267 @default.
- W4294970036 hasConceptScore W4294970036C173608175 @default.
- W4294970036 hasConceptScore W4294970036C187805909 @default.
- W4294970036 hasConceptScore W4294970036C19275194 @default.
- W4294970036 hasConceptScore W4294970036C24326235 @default.
- W4294970036 hasConceptScore W4294970036C3227080 @default.
- W4294970036 hasConceptScore W4294970036C41008148 @default.
- W4294970036 hasConceptScore W4294970036C41112130 @default.
- W4294970036 hasConceptScore W4294970036C46362747 @default.
- W4294970036 hasConceptScore W4294970036C70970002 @default.
- W4294970036 hasLocation W42949700361 @default.
- W4294970036 hasOpenAccess W4294970036 @default.
- W4294970036 hasPrimaryLocation W42949700361 @default.
- W4294970036 hasRelatedWork W1511186168 @default.
- W4294970036 hasRelatedWork W1879578558 @default.
- W4294970036 hasRelatedWork W2017903029 @default.
- W4294970036 hasRelatedWork W2088405182 @default.
- W4294970036 hasRelatedWork W2182262892 @default.
- W4294970036 hasRelatedWork W2334621660 @default.
- W4294970036 hasRelatedWork W2336558189 @default.
- W4294970036 hasRelatedWork W4255807200 @default.
- W4294970036 hasRelatedWork W4294970036 @default.
- W4294970036 hasRelatedWork W4327545704 @default.
- W4294970036 hasVolume "88" @default.
- W4294970036 isParatext "false" @default.
- W4294970036 isRetracted "false" @default.
- W4294970036 workType "article" @default.