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- W4296413006 abstract "High-quality system-level message flow specifications are necessary for comprehensive validation of system-on-chip (SoC) designs. However, manual development and maintenance of such specifications are daunting tasks. We propose a disruptive method that utilizes deep sequence modeling with the attention mechanism to infer accurate flow specifications from SoC communication traces. The proposed method can overcome the inherent complexity of SoC traces induced by the concurrent executions of SoC designs that existing mining tools often find extremely challenging. We conduct experiments on five highly concurrent traces and find that the proposed approach outperforms several existing state-of-the-art trace mining tools." @default.
- W4296413006 created "2022-09-20" @default.
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- W4296413006 date "2022-09-12" @default.
- W4296413006 modified "2023-09-24" @default.
- W4296413006 title "Mining SoC Message Flows with Attention Model" @default.
- W4296413006 doi "https://doi.org/10.48550/arxiv.2209.07929" @default.
- W4296413006 hasPublicationYear "2022" @default.
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