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- W4307455436 abstract "This paper describes the TCAD-based design and verification of the different components of a 200 V GaN-on-SOI integrated circuits (ICs) platform developed on 200 mm substrates. This platform comprises of depletion-mode (d-mode) MIS-HEMTs, and Gated-Edge-Termination Schottky barrier diodes (GET-SBDs) monolithically integrated in an enhancement-mode (e-mode) HEMT technology baseline. A variety of low-voltage analog/logic devices and passive components further supports the GaN ICs platform. Device simulations have been verified using measured low voltage test structures. Verification of simulations with the measurements results in calibration of sheet resistance (R sh ) in the gate and access region, threshold voltage (V th ), drain current (I ds ), ON-resistance (R ON ), gate current (I g ) for HEMT structures, and turn-on voltage (V T ) and forward voltage drop (V F ) for GET-SBD structure. • TCAD-based design and verification of the different components of a 200 V GaN-on-SOI integrated circuits (ICs) platform developed on 200 mm substrates. • GaN-on-SOI IC Platform comprises of depletion-mode (d-mode) MIS-HEMTs, and Gated-Edge-Termination Schottky barrier diodes (GET-SBDs) monolithically integrated in an enhancement-mode (e-mode) HEMT technology baseline. • This work describes the calibration flow for the Schottky diodes and d-mode HEMTs along with pGaN HEMTs. • The major objective of this work is to optimize GaN-IC technologies by calibrating the lateral co-integrated GaN power devices with overlay of measured findings. • For TCAD verification, overlays between the simulated and measured properties will be displayed." @default.
- W4307455436 created "2022-11-01" @default.
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- W4307455436 date "2023-02-01" @default.
- W4307455436 modified "2023-10-03" @default.
- W4307455436 title "TCAD-based design and verification of the components of a 200 V GaN-IC platform" @default.
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- W4307455436 doi "https://doi.org/10.1016/j.sse.2022.108496" @default.
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