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- W4309156341 abstract "This paper presents a D-band frequency tripler consisting of a frequency multiplication block and a power amplification block. The power amplifier (P A) follows the frequency multiplier, aiming to further increasing the output power of the desired generated harmonic. This wideband frequency tripler is implemented in a <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>$130text{nm SiGe}$</tex> BiCMOS technology. It exhibits a bandwidth of30 GHz (from 130 GHz to 160 GHz), an output power higher than <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>$0 text{dBm}$</tex> while the DC power consumption does not exceed <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>$310text{mW}$</tex> ." @default.
- W4309156341 created "2022-11-24" @default.
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- W4309156341 date "2022-10-11" @default.
- W4309156341 modified "2023-09-27" @default.
- W4309156341 title "A 130–160 GHz Frequency Tripler in a 130nm SiGe BiCMOS Technology" @default.
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- W4309156341 doi "https://doi.org/10.1109/austrochip56145.2022.9940746" @default.
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