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- W4310584112 abstract "This paper presents ultra-low power completely on-chip radio frequency (RF) receiver design techniques for high-speed Internet-of-Things (IoT) applications using TSMC 40nm CMOS process. Two RF receivers are designed to present the advantages of coherent and non-coherent detection in the receiver path. The proposed non-coherent detection receiver (Rx I) utilizes a novel pseudo-balun envelope detector and a comparator to decode on-off keying (OOK) modulated signal at a 200-kbps data rate in the 2.4 GHz ISM band. The simulated results show that the receiver can achieve -52 dBm sensitivity for only 13.3 nW of power consumption from 0.8/0.5 V supply. The proposed coherent detection receiver (Rx II) utilizes a mixer-first low intermediate frequency (IF) receiver architecture with an in-built frequency synthesizer to decode OOK modulated signal at a 5 Mbps data rate in the 2.4 GHz ISM band. The simulated results show that the receiver can achieve -80 dBm sensitivity for only 105 μW of power consumption from a 0.9/1 V supply." @default.
- W4310584112 created "2022-12-12" @default.
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- W4310584112 date "2022-10-25" @default.
- W4310584112 modified "2023-10-17" @default.
- W4310584112 title "Ultra-Low Power 2.4 GHz Receiver Design Techniques for IoT Applications" @default.
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- W4310584112 doi "https://doi.org/10.1109/icsict55466.2022.9963300" @default.
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