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- W4312459021 abstract "This article presents a concurrent dual-band low-noise amplifier (LNA) in a 22-nm fully-depleted silicon-on-insulator (FDSOI) CMOS process. This three-stage cascode LNA is designed to operate concurrently between 23.3 and 30.3 GHz and 38 and 44.7 GHz ( <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$K$ </tex-math></inline-formula> -/ <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Ka$ </tex-math></inline-formula> -band) for 5G mm-wave bands. To achieve a high rejection in the stopband between the two passbands, a notch circuit is designed using a cross-coupled pair (XCP) to mitigate the limited inductor/capacitor quality factors, thus enhancing notch depth in the second stage. The gain of the LNA can be digitally controlled in the third stage by over eight steps of 1 dB. The input matching network also acts like a high-pass filter to generate a sufficient rejection for frequencies below 13 GHz. The measured gain is 22 dB at 24 GHz and 16 dB at 40.5 GHz, with a 3-dB bandwidth of 23.3–30.3 GHz for low passband and 38–44.7 GHz for high passband. The LNA achieves a noise figure (NF) of 2.55/4.75 dB at 28/40 GHz, a rejection of 19.2 dB at 34.1 GHz, and a power consumption of 18 mW with supply voltages of 0.8 V for the first stage, and 1.0 V for the rest. The chip has a length of <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$1035 ~mu text{m}$ </tex-math></inline-formula> , a width of <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$885 ~mu text{m}$ </tex-math></inline-formula> , and an area of <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$0.916 mm^{2}$ </tex-math></inline-formula> including all pads and decoupling capacitors." @default.
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- W4312459021 date "2023-03-01" @default.
- W4312459021 modified "2023-10-18" @default.
- W4312459021 title "A Millimeter-Wave Concurrent LNA in 22-nm CMOS FDSOI for 5G Applications" @default.
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- W4312459021 doi "https://doi.org/10.1109/tmtt.2022.3219869" @default.
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