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- W4312705953 abstract "The calculation of implied volatility is important in the financial industry, as it is frequently used for hedging and trading strategies. In addition, there is a great need for a low-latency yet precise method to calculate. In this paper, we propose a calculation framework that utilizes parallelism for lower latency as a whole. It is an extension of the Bi-section Method that we call the Multi-section method. It allows traders to utilize FPGA, GPU, and other hardware accelerators to quickly compute the computation of IV in a parallel manner. In addition, to solve the difficulty of complex operators, we also developed a hybrid computing architecture that mixes FPGAs, CPUs, and GPUs to offload difficult tasks unsuitable for FPGAs. Finally, our algorithm is implemented and tested on both GPUs and FPGAs. Using data collected from the S&P 500 index, we can validate that they are at least 4 to 5 times faster than traditional methods. Using this framework, we can predict the market’s potential direction in a faster way." @default.
- W4312705953 created "2023-01-05" @default.
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- W4312705953 date "2022-07-25" @default.
- W4312705953 modified "2023-09-30" @default.
- W4312705953 title "FPGA based Implied Volatility Calculation with Multi-section Method" @default.
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- W4312705953 doi "https://doi.org/10.1109/indin51773.2022.9976086" @default.
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