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- W4313270728 abstract "We have proposed a structure design of single-photon avalanche diode fabricated in the Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) 0.18- <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$mu text{m}$ </tex-math></inline-formula> high-voltage (HV) CMOS technology, which improves the limited operating excess voltage for an n-on-p design without any other customized well layer. With the introduction of a deep p-well isolation (ISO) layer, the excess bias is significantly elevated, so that the device exhibits high photon detection probability (PDP) with relatively low dark count rate. The n-on-p-type device is favorable for 3-D-stacked backside illuminated structure and can attain high PDP at longer wavelength. With the improved jitter and after-pulsing probability, our designed device can be suitable for the application of light detection and ranging (LiDAR)." @default.
- W4313270728 created "2023-01-06" @default.
- W4313270728 creator A5081252439 @default.
- W4313270728 creator A5082987913 @default.
- W4313270728 date "2023-02-01" @default.
- W4313270728 modified "2023-09-29" @default.
- W4313270728 title "Design and Characterization of n/p-well CMOS SPAD With Low Dark Count Rate and High Photon Detection Efficiency" @default.
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- W4313270728 doi "https://doi.org/10.1109/ted.2022.3231575" @default.
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