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• W4313291225 abstract "The noninverting buck–boost converter is suitable for battery-powered applications as it can operate in buck, buck–boost, and boost modes. Traditional current mode and voltage mode controllers are generally employed to control it in a closed loop. It is well established that a peak V <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> controller provides superior load-transient performance compared to conventional current mode and voltage mode controllers. However, a peak V <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> controller cannot be applied to the noninverting buck–boost converter during boost and buck–boost modes because of its nonminimum phase behavior. This article proposes a digital peak V <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> controller that can work effectively during all modes. The proposed controller samples both the inductor current and output voltage at the rate of the switching frequency. Thus, the digital implementation of this controller does not need high-speed analog-to-digital converters (ADCs). Unlike traditional peak V <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> controllers, the proposed controller does not depend on the effective series resistance (ESR) of the output capacitor. An average model-based small-signal model of the proposed controller is presented. Analysis shows that a sufficient current loop gain can make the system behave like a first-order system. This enables the designer to employ a PI controller to achieve superior transient performance in all the modes. Furthermore, fast-scale stability analysis of the controller is carried out using approximate discrete-time models to derive an analytical stability boundary of slope compensation. A noninverting buck–boost converter prototype is fabricated, and the proposed controller is implemented using an FPGA platform. Experimental results show a close correlation with the analysis." @default.
• W4313291225 created "2023-01-06" @default.
• W4313291225 creator A5009919874 @default.
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• W4313291225 date "2023-06-01" @default.
• W4313291225 modified "2023-09-26" @default.
• W4313291225 title "Design of Stable Digital V² Controllers for the Synchronous Noninverting Buck–Boost Converter" @default.
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• W4313291225 doi "https://doi.org/10.1109/jestpe.2022.3233250" @default.
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