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- W4313484792 abstract "The necessity of efficient hardware accelerators for image processing kernels is a well known problem. Unlike the conventional HDL based design process, High-level Synthesis (HLS) can directly convert behavioral (C/C++) description into RTL code and can reduce design complexity, design time as well as provide user opportunity for design space exploration. Due to the vast optimization possibilities in HLS, a proper application level behavioral characterization is necessary to understand the leverages offered by these workloads especially for facilitating parallel computation. In this work, we present a set of HLS optimization strategies derived upon exploiting the most general HLS influential characteristic features of image processing algorithms. We also present an HLS benchmark suite ImageSpec to demonstrate our strategies and their efficiency in optimizing workloads spanning diverse domains within image processing sector. We have shown that an average performance to hardware gain of 143x could be achieved over the baseline implementation using our optimization strategies." @default.
- W4313484792 created "2023-01-06" @default.
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- W4313484792 date "2022-08-01" @default.
- W4313484792 modified "2023-09-23" @default.
- W4313484792 title "ImageSpec: Efficient High-Level Synthesis of Image Processing Applications" @default.
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- W4313484792 doi "https://doi.org/10.1109/dsd57027.2022.00019" @default.
- W4313484792 hasPublicationYear "2022" @default.
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