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• W4313557604 abstract "As microelectronics technology has continued to progress, the multiple-node upset (MNU), caused by the single-particle and charge-sharing effects, has gradually become one of the most important factors affecting chip reliability. To enhance the reliability of these latches, a TNU completely self-recoverable (TNUCR) latch is first proposed in this paper, mainly consisting of five interlocked four-input C-elements (CEs) and inverters, which are cross-connected to form a ring. For any individual CE, due to the presence of a feedback loop, the value of its output is inverted and becomes the input to the other four CEs, which enables the latch to self-recover from all TNUs. Second, we propose an improved low-cost TNU completely self-recoverable (LCTNUCR) latch. This latch replaces the inverter with a four-input CE and uses a high-speed transmission path (HSTP), which can more rapidly self-recover from all TNU situations. It is demonstrated by experimental results that the two proposed latches are not only TNU tolerant but also TNU self-recoverable. Moreover, based on special design and the adoption of clock gating techniques, the proposed TNUCR latch has a delay-power-area product reduction of about 41.05%, while the proposed LCTNUCR latch has a DPAP reduction of about 71.30% compared to the latest representative TNU hardened latch." @default.
• W4313557604 created "2023-01-06" @default.
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• W4313557604 date "2023-05-01" @default.
• W4313557604 modified "2023-09-27" @default.
• W4313557604 title "Four-input-C-element-based multiple-node-upset-self-recoverable latch designs" @default.
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• W4313557604 doi "https://doi.org/10.1016/j.vlsi.2022.12.012" @default.
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