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- W4364860151 abstract "In this paper, a CMOS receiver circuit exploiting passive voltage-commutating mixers and baseband feedback loop is proposed. Technically, the active feedback loop at baseband not only enables in-band signals transfer but also suppresses out-of-band blocker injections by constructing two-fold filters at RF and BB, simultaneously, thanks to mixers' reciprocity. The voltage-commutating passive mixers are adopted and merged into current mirrors, which efficiently reduce the power consumption of the digital logic LO generator. A complimentary nMOS and pMOS configuration has been further taken to boost power supply efficiency. The suggested analog receiver is designed by TSMC 65 nm CMOS process. Specifically, simulations manifest a 3.4 dB NF, and 32 dB peak gain across the frequency span of 1 ~ 5 GHz. The in-band IIP3 is found at around -12 dBm while the out-of-band one is shown as 9 dBm. At typical 1 GHz LO frequency, the presented receiver core only burns 22 mW from the 1.2/1.8V power supply." @default.
- W4364860151 created "2023-04-13" @default.
- W4364860151 creator A5000970532 @default.
- W4364860151 creator A5065707087 @default.
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- W4364860151 date "2022-11-11" @default.
- W4364860151 modified "2023-09-26" @default.
- W4364860151 title "A 22 mW CMOS Receiver Frontend Using Active-Feedback Baseband and Passive-Voltage Mixers Embedded in Current Mirrors" @default.
- W4364860151 doi "https://doi.org/10.1109/apccas55924.2022.10090406" @default.
- W4364860151 hasPublicationYear "2022" @default.
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