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- W4367308063 abstract "Imec logic N2+ design rule defines a minimum via pitch of 36nm. An EUV single patterning solution at 0.33 NA is explored on a random logic via design. From an earlier simulation study , it was shown that Ta-based bright field mask delivers the best resolution enhancement technology (RET) solution. In this paper the simulation results will be validated on wafer. Negative-tone development (NTD) with a metal-oxide resist process using a bright field (BF) mask and positivetone development (PTD) with a chemically amplified resist process using a dark field (DF) mask are compared. In addition, source-mask optimizations (SMO) including sub-resolution assist features (SRAF) were used as a RET, and optical proximity correction (OPC) was carried out on the design clips to achieve optimum lithography performance. We report the best choice among the listed options, and present our recommendation on OPC, RET and process based on the simulation and wafer data in order to improve the resolution, therefore extending the single exposure pitch limit." @default.
- W4367308063 created "2023-04-29" @default.
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- W4367308063 date "2023-04-28" @default.
- W4367308063 modified "2023-10-16" @default.
- W4367308063 title "EUV single patterning of random logic via using bright field mask" @default.
- W4367308063 doi "https://doi.org/10.1117/12.2658344" @default.
- W4367308063 hasPublicationYear "2023" @default.
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