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- W4367358342 abstract "Nowadays, embedded processors face various hardware security issues such as hardware trojans (HT) and code tamper attacks. In this paper, a novel cycle-level recovery method for HT tamper in embedded processor is proposed, which consists two units, a General-Purpose Register (GPRs) backup unit and a PC rollback unit. The former one is designed to replace original register files with backup function extra. And the latter one is composed for rollback operations based on the exact PC address corresponding to the wrong instruction. If a HT tamper is detected, the backup unit works in conjunction with PC rollback unit allowing the processor to resume the instruction execution. The proposed method has been implanted into a RISC-V core of PULpino, and the experimental results show that the processor can restore from fault state caused by inserted HT in real time with the latency of 7 clock cycles, including 2 clock cycles for detection." @default.
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- W4367358342 date "2023-01-01" @default.
- W4367358342 modified "2023-09-25" @default.
- W4367358342 title "A Novel Fast Recovery Method for HT Tamper in Embedded Processor" @default.
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- W4367358342 doi "https://doi.org/10.1007/978-3-031-31420-9_8" @default.
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