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- W4375809610 abstract "In this article, the degradation mechanisms of radiation-hardened vertical double-diffused MOSFETs (VD-MOSFET) experiencing gamma ray irradiation and annealing sequentially experiment device and simultaneously experiment device (Si-ED) are studied and compared. Experiments demonstrate that the Si-ED irradiated with gate bias (+12 V) has a lower oxide-trapped charges increment ( <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {ot}})$ </tex-math></inline-formula> and higher interface states increment ( <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {it}})$ </tex-math></inline-formula> , compared to those of sequential experiment device (Se-ED). However, for Si-ED irradiated with drain bias (200 V), it shows lower <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {ot}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {it}}$ </tex-math></inline-formula> than those of Se-EDs, which is similar to that observed in the case of devices irradiated with three-terminal bias (200-V drain bias, −10-V gate bias, and source grounded). In addition, for all cases, it is seen that the drain-biased devices own a larger <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {ot}}$ </tex-math></inline-formula> but a smaller <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {it}}$ </tex-math></inline-formula> , compared to those of gate-biased ones, and the three-terminal-biased devices show the lowest, especially in Si-ED. As a result, the variations of <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {ot}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$Delta {N}_{text {it}}$ </tex-math></inline-formula> could cause different degradations of threshold voltage, breakdown voltage, leakage current, and ON-state resistance of devices, which would inevitably threaten the proper functioning of electrical systems. Moreover, in this article, it is concluded that the existing standard, i.e., accelerated annealing after irradiation, cannot reflect the actual radiation reliability of devices. Other evaluation methods regarding total ionizing dose (TID) need to be further explored comprehensively." @default.
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- W4375809610 date "2023-06-01" @default.
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- W4375809610 title "Degradation of VDMOS Under Simultaneous and Sequential Stress of Gamma Ray Irradiation and Annealing Process" @default.
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- W4375809610 doi "https://doi.org/10.1109/ted.2023.3269408" @default.
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