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- W4377224896 abstract "<p>This paper explicates the design and implementation of a switch capacitor DC-DC converter system for Radio Frequency (RF) energy harvesting applications for an input voltage in the sub-150mV range, using 180-nm CMOS triple-well BCD technology. The proposed system incorporates a charge pump architecture that employs an improvised Dynamic Gate Biasing (DGB), Forward and Reverse Body Bias technique (FRBB), along with a time axis symmetrical clocking scheme implemented using an advanced bootstrapped CMOS driver to enhance the overall drive capability of the system at low input voltages. Post-layout extracted simulations demonstrate that the proposed system achieves higher overall efficiency, delivering a peak Power Conversion Efficiency (PCE) of 85.8% at 125mV input voltage, outperforming other state-of-the-art architectures in similar voltage ranges. Moreover, the proposed system exhibits reliable operation even at input voltages as low as 85mV, while maintaining good overall efficiency.</p>" @default.
- W4377224896 created "2023-05-23" @default.
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- W4377224896 date "2023-05-22" @default.
- W4377224896 modified "2023-09-30" @default.
- W4377224896 title "High-Efficiency CMOS Charge Pump for Ultra-Low Power RF Energy Harvesting Applications" @default.
- W4377224896 doi "https://doi.org/10.36227/techrxiv.23003111" @default.
- W4377224896 hasPublicationYear "2023" @default.
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