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- W4379115963 abstract "Recent advances in auto-generating analog and mixed-signal (AMS) circuits use standard digital tool flows to compose AMS circuits from a combination of digital standard cells and a set of auxiliary cells (auxcells). Until now, generating auxcell layouts for each new PDK was the last manual step in the flow for auto-generating AMS components, which limited the available auxcells and reduced the optimality of the auto-generated AMS designs. To solve this, we propose AuxcellGen, a framework to auto-generate auxcell layouts and performance models. Aux-cellGen generates a parasitic-aware auxcell performance model using a neural network (NN), auto-sizes and optimizes auxcell schematics for a given design target, and auto-generates auxcell layouts. The framework is demonstrated by auto-generating tristate buffer auxcells for PLLs and sense-amplifier auxcells for SRAM across a range of user specifications that are compatible with standard cell and memory bitcell pitch." @default.
- W4379115963 created "2023-06-03" @default.
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- W4379115963 date "2023-04-01" @default.
- W4379115963 modified "2023-09-27" @default.
- W4379115963 title "AuxcellGen: A Framework for Autonomous Generation of Analog and Memory Unit Cells" @default.
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- W4379115963 doi "https://doi.org/10.23919/date56975.2023.10137270" @default.
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