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- W4385080015 abstract "This work presents an energy-efficient on-chip resistive frequency-locked oscillator (RFLO) for achieving superb temperature and frequency stabilities. The resistive frequency-locked oscillator outperforms the power consumption and the temperature coefficient (TC) compared to the conventional relaxation oscillator. Frequency dividers are utilized in the feedback loop to reduce the reference current and clock power consumption. Moreover, switched-capacitor and switched-resistor techniques are both exploited to accomplish low area and low power consumption. This work was fabricated in TSMC <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>$0.180 mumathrm{m}$</tex> process. The prototype operates at 200 kHz and achieves a 23.5 ppm/°C of TC across the temperature range from −40°C to 90°C and a line sensitivity of 0.44 %/V. Consuming 196 nW at 1 V supply voltage, it can reach a 0.98 pJ/cycle of energy efficiency." @default.
- W4385080015 created "2023-07-23" @default.
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- W4385080015 date "2023-05-21" @default.
- W4385080015 modified "2023-09-24" @default.
- W4385080015 title "A 0.98 pJ/Cycle 3.7 ppm Long-Term Stability Frequency-Locked Oscillator with Switched-Capacitor and Switched-Resistor Techniques" @default.
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- W4385080015 doi "https://doi.org/10.1109/iscas46773.2023.10182024" @default.
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