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- W4385187231 abstract "This paper presents a novel two-stage amplifier, which cascades a duty-cycled inverter-based OTA and a floating-inverter amplifier (FIA). The proposed OTA-FIA can achieve 72.0dB gain under a 1.2V supply, whose output swing is 420mV. Additionally, it exhibits intrinsic loop stability without compensation and reduces thermal noise during integration. The proposed OTA-FIA is adopted in a low distortion 1-1-1 MASH structure to obtain high resolution. Simulated in a 55 nm CMOS process, the proposed ADC can achieve an SNDR of 94.6dB with a bandwidth of 50kHz. It consumes <tex xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>$363.8mu mathrm{W}$</tex> from a 1.2V supply at a 5MS/s sampling frequency, resulting in a 176.0dB SNDR-based Schreier FoM." @default.
- W4385187231 created "2023-07-25" @default.
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- W4385187231 date "2023-05-21" @default.
- W4385187231 modified "2023-09-26" @default.
- W4385187231 title "A 94.6dB-SNDR 50kHz-BW 1-1-1 MASH ADC Using OTA-FIA Based Integrators" @default.
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- W4385187231 doi "https://doi.org/10.1109/iscas46773.2023.10181887" @default.
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