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• W4385212911 abstract "As the most scaled memory solution at present, we for the first time developed and begun volume production of 14nm DRAM to extend the continuous shrink trend in semiconductor memory industry. In the new era of 14nm node DRAM and beyond, process integration and device performance are both essential due to the rapid increase of memory cell disturbance and resistance. To resolve the difficulty of process integration, five-layer EUV processes and L-CNT (Line-type storage node contact) scheme were devised, reducing the number of process steps by approximately 20%. To boost device performance, extremely shallow doping engineering played a pioneering role to advance the performance of PMOS transistor by 40% in terms of contact resistance. Our 14nm DRAM will provide the finest and most advanced solution for the next-generation DRAM platform–DDR5 and beyond." @default.
• W4385212911 created "2023-07-25" @default.
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• W4385212911 date "2023-06-11" @default.
• W4385212911 modified "2023-10-12" @default.
• W4385212911 title "14nm DRAM Development and Manufacturing" @default.
• W4385212911 cites W2289589977 @default.
• W4385212911 doi "https://doi.org/10.23919/vlsitechnologyandcir57934.2023.10185314" @default.
• W4385212911 hasPublicationYear "2023" @default.
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