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- W4385225092 abstract "The extended manual layout process for RF and analog/mixed-signal design restricts design space exploration and limits design productivity. This work demonstrates the efficacy of an automated layout generator versus a manual approach using a state-of-the-art MIMO receiver. Multiple smaller floorplans of the layout are generated automatically in hours compared to weeks for a single manual layout. Measured results from an automatically generated layout fabricated in TSMC 65nm CMOS show performance numbers comparable to the manual design. Measured in-band/in-notch IIP <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>3</inf> and out-of-band/in-notch IIP <inf xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>3</inf> are 18.3dBm and 23.64dBm, respectively." @default.
- W4385225092 created "2023-07-25" @default.
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- W4385225092 date "2023-06-11" @default.
- W4385225092 modified "2023-10-03" @default.
- W4385225092 title "Exploration of Design / Layout Tradeoffs for RF Circuits using ALIGN" @default.
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- W4385225092 doi "https://doi.org/10.1109/rfic54547.2023.10186141" @default.
- W4385225092 hasPublicationYear "2023" @default.
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