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- W4385453670 abstract "Emerging applications are calling for significantly larger FPGAs with multi-dies. However, the interconnection architecture of existing FPGAs lacks scalability. The execution time and failure probability of their RTL-to-Silicon process increase dramatically with the growth of design and the number of dies. To address this issue, we propose both an NoC-based scalable multi-die FPGA architecture and a corresponding floorplanning framework, namely (). First, from the architecture side, we introduce an interconnection architecture with a class of scalable hierarchical topology. Second, for the algorithm side, we formulate the generic floorplanning problem for NoC-based architectures as a multi-objective Mixed Integer Linear Programming (MILP) problem, balancing the design timing and interconnection workload. Third, we develop a novel recursive approximate method to efficiently solve the multi-objective MILP formulation over the proposed architecture, with a configurable trade-off between solution quality and solver run time. Experimental results show that the scalability of our proposed technique is at least <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$1.5 times$</tex-math> </inline-formula> on all and <inline-formula xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink> <tex-math notation=LaTeX>$3 times$</tex-math> </inline-formula> on certain benchmarks as that of the state-of-the-art solutions with no loss of design throughput." @default.
- W4385453670 created "2023-08-02" @default.
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- W4385453670 date "2023-01-01" @default.
- W4385453670 modified "2023-09-27" @default.
- W4385453670 title "HRFF: Hierarchical and Recursive Floorplanning Framework for NoC-Based Scalable Multi-Die FPGAs" @default.
- W4385453670 doi "https://doi.org/10.1109/tcsi.2023.3298372" @default.
- W4385453670 hasPublicationYear "2023" @default.
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