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- W4386764525 abstract "Fast and accurate pre-routing timing prediction is crucial in the very-large-scale integration (VLSI) design flow. Existing machine learning (ML)-assisted pre-routing timing evaluators neglect the impact of timing optimization, which may render their approaches impractical in real circuit design flows. To model the impact of timing optimization, we propose an endpoint embedding framework that integrates netlist-layout information via multimodal fusion. An end-to-end flow is further developed for pre-routing restructure-tolerant prediction on global timing metrics. Comprehensive experiments on large-scale RISC-V designs with advanced 7-nm technology node demonstrate the superiority of our model compared to the SOTA pre-routing timing evaluators." @default.
- W4386764525 created "2023-09-16" @default.
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- W4386764525 date "2023-07-09" @default.
- W4386764525 modified "2023-10-06" @default.
- W4386764525 title "Restructure-Tolerant Timing Prediction via Multimodal Fusion" @default.
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- W4386764525 doi "https://doi.org/10.1109/dac56929.2023.10247802" @default.
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