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- W4386859265 abstract "Machine learning (ML) models have gained prominence in solving real-world tasks. However, implementing ML models is both compute- and memory-intensive. Domain-specific architectures such as Resistive Random Access Memory (ReRAM)-based Processing-in-Memory (PIM) platforms have been proposed to efficiently accelerate ML training and inference. However, existing ML workloads require a high amount of area and power for training. A major contributor to the area and power overheads is the Analog-to-Digital Converter (ADC). In this work, we propose a mixed pruning technique along with a novel reconfigurable ADC design to improve the power consumption profile. Overall, the pruned model with the reconfigurable ADC achieves ~50% reduction in power for training compared to existing state-of-the-art ReRAM-based architectures." @default.
- W4386859265 created "2023-09-20" @default.
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- W4386859265 date "2023-08-07" @default.
- W4386859265 modified "2023-09-27" @default.
- W4386859265 title "Energy-Efficient ReRAM-Based ML Training via Mixed Pruning and Reconfigurable ADC" @default.
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- W4386859265 doi "https://doi.org/10.1109/islped58423.2023.10244258" @default.
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