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- W4387219792 abstract "Most digital designs contain multiple clock domains, and data must be communicated efficiently and reliably across these domain boundaries. This chapter discusses synchronization and communication within and across clock domains. Circuits for synchronizing asynchronous signals are presented. A standard four-phase handshake protocol for synchronous and for asynchronous communication is introduced. For more complex designs, FIFO-based synchronous and asynchronous communication is studied in detail. Also, the design of an asynchronous FIFO based on RAM blocks is provided. Specific attention is paid to the crossing of state information across asynchronous boundaries. An analytical model is developed to analyze the communication performance and its delay, throughput, and buffer requirement. In a detailed case study, all introduced communication protocols are verified, and their performance is compared." @default.
- W4387219792 created "2023-10-01" @default.
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- W4387219792 date "2023-01-01" @default.
- W4387219792 modified "2023-10-01" @default.
- W4387219792 title "Synchronization and Communication" @default.
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- W4387219792 doi "https://doi.org/10.1007/978-3-031-35605-6_10" @default.
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