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- W4387232139 abstract "—Energy-efficient design techniques for an adaptive Look-Up Table (LUT) based Digital Predistortion (DPD) system are presented. The proposed methods are simplification of the adaptation function, reduction of the memory hardware complexity and bypassing of the equalizer circuit. The equalizer circuit block is critical while the adaptation loop is enabled but need for this block while the loop is disabled is explored to reduce power dissipation. Three adaptation functions that require less complex hardware are presented. The system is modeled with Matlab-Simulink, then implemented using an FPGA and 130 nm ST-Silicon On Insulator (SOI) process. More than 33% of power saving is obtained by applying the proposed techniques and further power reductions are also possible by configuring the system." @default.
- W4387232139 created "2023-10-02" @default.
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- W4387232139 date "2023-11-01" @default.
- W4387232139 modified "2023-10-11" @default.
- W4387232139 title "Energy-efficient design techniques for LUT based adaptive digital pre-distorters" @default.
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- W4387232139 doi "https://doi.org/10.1016/j.mejo.2023.105976" @default.
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