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• W50841198 abstract "The need to support evolving standards, rapid prototyping and fast time-to-market are some of the key reasons for desiring programmability in future wireless base-stations. However, supporting highly complex signal processing algorithms for multiple users at high data rates (in Mbps), requiring billions of operations per second, while providing power efficiency present challenges in attaining that goal. This paper demonstrates the viability of stream processors for physical layer base-station processing by demonstrating a fully loaded 3G base-station for 32 users meeting 128 Kbps/user (rate 1/2 constraint 9 coded data rate) at estimated power consumption of 8.2 W. However, when the system load decreases and the amount of data parallelism reduces, clusters of ALUs in the stream processor remain unutilized and waste power. We provide reconfiguration support in stream processors that allows us to turn off clusters dynamically as the data parallelism reduces. Support is provided to turn off ALUs as well such that only the minimum number of ALUs in active clusters needed to meet performance requirements are scheduled. When the system load changes from a fully loaded 32-user base-station at constraint length 9 to say, a more typical 16 active users at constraint length 7, the power consumption can reduce to 2.23 W with 5.06 W power savings due to frequency scaling and a further 0.91 W due to hardware reconfiguration. Thus, by providing real-time and power efficient support in fully programmable hardware, the architecture and algorithm development for wireless communication systems can be made independent and limited versions of future systems can be deployed which can co-exist with current systems until programmable architecture research rises to meet the challenge." @default.
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• W50841198 date "2003-10-20" @default.
• W50841198 modified "2023-09-27" @default.
• W50841198 title "Reconfigurable stream processors for wireless base-stations" @default.
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