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- W65391447 abstract "Abstract Nowadays, various techniques have been developed for reducing the power consumption of VLSI designs, such as pipelining and parallel processing, reducing the dynamic power, voltage scaling, clock gating, etc. To increase the processing speed of the silicon IC, logic gates are made using CNT FETs and designed using the VLSI technology. Lowering down the power consumption and enhancing the processing speed of IC designs are undoubtedly the two important design challenges in designing ICs. The objective of this paper is to provide high-speed and low-power multiplier. In this paper, a VLSI designed low-power; high-speed multiplier is proposed using the SPST approach. This multiplier is designed by applying the spurious power suppression technique (SPST) on booth multiplier. To add partial products, Modified CLA adder and SPST adder are used. The proposed architecture is synthesized. In Xilinx RTL, chip X-C6SLX45T3FGG484 Spartan 3 series is selected for benchmarking. The timing report shows that to perform 16-bit multiplier, the minimum period required for array multiplier is 21.068 ns, and SPST-equipped booth multiplier requires 14.886 ns. The proposed multiplier requires 13.263 ns. An improvement of 37.04 % is achieved in speed when compared to the proposed multiplier with array multiplier, and an improvement of 10.9 % is achieved in speed when compared to SPST-equipped booth multiplier adder. The proposed multiplier implementation with AND gates has an extremely high flexibility on adjusting the data asserting time. This facilitates the robustness of SPST can attain 30 % speed improvement.KeywordsBooth encoder circuitSPST techniqueDetection unitMCLA adderSPST adder" @default.
- W65391447 created "2016-06-24" @default.
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- W65391447 date "2013-09-14" @default.
- W65391447 modified "2023-09-25" @default.
- W65391447 title "High-Speed Low-Power VLSI Architecture for SPST-Equipped Booth Multiplier Using Modified Carry Look Ahead Adder" @default.
- W65391447 cites W2158151684 @default.
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- W65391447 doi "https://doi.org/10.1007/978-81-322-1157-0_47" @default.
- W65391447 hasPublicationYear "2013" @default.
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