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- W7620075 abstract "In this article, we present a HW/SW codesign approach for the implementation of multilayer perceptrons resulting in an embedded system that can be used in wide variety of applications. The motivation for the HW/SW codesign includes declining time-to-market and power constraints as well as increasing gap between silicon area and computational intensity. By utilizing codesign, hardware tasks −to be implemented either on ASIC or reconfigurable logic device− can be organized in a way that is compatible with the software tasks running on a host computer or a DSP. In our model a general-purpose computing platform acts as the master controller which transmits appropriate signals to an FPGA-based coprocessor. An array of processing elements (PEs) is mapped onto a single FPGA for forward propagation to exploit the parallel nature of the network architecture. Synthesis results indicate high speed operation with limited number of PEs which may be a significant contribution in designs where high throughputs can be obtained in low cost FPGA’s." @default.
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- W7620075 date "2006-01-01" @default.
- W7620075 modified "2023-09-27" @default.
- W7620075 title "HW/SW Codesign of FPGA-based Neural Networks" @default.
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