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• W762655566 abstract "In this thesis a new approach is described for the development of human–computer interfaces. In particularthe case of pattern recognition systems based on Hidden Markov Models have been taken into account.The research started from he development of techniques for the realization of natural language speechrecognition systems. The Hidden Markov Model (HMM) was chosen as the main algorithmic tool to beused to build the system. After the early work the goal was extended to the development of an hardwarearchitecture that provided a reconfigurable tool to be used in any pattern recognition task, and not only inspeech recognition.The whole work is thus focused on the development of dedicated hardware architectures, but also somenew results have been obtained on the classification of electroencephalographic signals through the use ofHMMs.Firstly a system–level architecture has been developed to be used in HMM based pattern recognitionsystems. The architecture has been conceived in order to be able to work as a stand–alone system. Then aVHDL description has been made of a flexible and completely reconfigurable hardware HMM processor andthe design was successfully simulated. A parallel array of these processors is actually the core processingblock of the developed architecture.Then two suitable FPGA based, fast prototyping platforms have been identified to be the targets forthe implementation tests. Different configurations of parallel HMM processor arrays have been set up andmapped on the target FPGAs. Some solutions have been selected to be the best in terms of balance betweenperformance and resources utilization.Furthermore a software HMM based pattern recognition system has been chosen to be the reference systemfor the functionality of the implemented subsystems. A set of tests have been developed with the aim to testthe correct functionality of the hardware. The implemented system was compared to the reference systemon the basis of the tests’ results, and it was found that the behavior was the one expected and the requiredfunctionality was correctly achieved.Finally the implementation of the parallel HMM array was tested through its application to two real–worldapplications: a speech recognition task and a brain–computer interface task. In both cases the architectureshowed to be functionally suitable and powerful enough to handle the task without problems. The applicationof the hardware processing to speech recognition opens new perspectives in the design of this kind of systemsbecause of the dramatic increment in performance. The application to brain–computer interface is reallyinteresting because of a new approach in the classification of EEG that shows how could be possible a futuredevelopment of interfaces based on the classification of spontaneous thought.The possible evolution directions of the work started with this thesis are many. Effort could be spent ofthe implementation of the developed architecture as a stand–alone reconfigurable system suitable for any kindof HMM–based pattern recognition task. The potential performance of such a system could open the wayto extremely complex real–time pattern recognition systems, and thus to the realization of truly multimodalinterfaces, with a variety of applications, from space to aid systems for the impaired." @default.
• W762655566 created "2016-06-24" @default.
• W762655566 creator A5078463659 @default.
• W762655566 date "2009-07-29" @default.
• W762655566 modified "2023-09-28" @default.
• W762655566 title "Design of hardware architectures for HMM–based signal processing systems with applications to advanced human-machine interfaces" @default.
• W762655566 hasPublicationYear "2009" @default.
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