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- W765159401 abstract "Stack specimen with three dimensional interconnection structure through Cu via of diameter, height and pitch was successfully fabricated using subsequent processes of via hole formation with Deep RIE (reactive ion etching), Cu via filling with pulse-reverse electroplating, Si thinning with CMP, photolithography, metal film sputtering, Cu/Sn bump formation, and flip chip bonding. Contact resistance of Cu/Sn bump and Cu via resistance could be determined ken the slope of the daisy chain resistance vs the number of bump joints of the flip chip specimen containing Cu via. When flip- chip bonded at for 2 minutes, the contact resistance of the Cu/Sn bump joints of size was 6.7m and the Cu via resistance of diameter, height was 2.3m." @default.
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- W765159401 date "2005-01-01" @default.
- W765159401 modified "2023-09-23" @default.
- W765159401 title "Interconnection Process and Electrical Properties of the Interconnection Joints for 3D Stack Package with $75{mu}m$ Cu Via" @default.
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