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- W805388699 abstract "AbstractIn this paper, we propose a low complexity algorithm to jointly demosaic and denoise Bayer format image, which combines the Hamilton and Adams (HA) method for interpolation and Epsilon filter for noise removal. Instead of using a 5x5 filtering window, one 7x1 horizontal Epsilon filter and one 1x3 vertical Epsilon filter are adopted in our method, which reduces hardware cost significantly while keeps high performance. Simulation results show that our proposed algorithm improves the mean PSNR performance of image by 1 dB compared to the algorithms treating these two processes independently. Furthermore, only 4 line buffers are consumed, and simple logic operators including adders and shifters are used for computation. For real-time implementation, a 5 stage pipelined VLSI architecture with 24 kb SRAM for line buffer is presented. The prototype of the joint processor is verified with Xilinx FPGA device and consumes about 36.6K gates for computational logic after synthesis with TSMC 90nm technology. The joint processor achieves a throughput of 6 Gbps at 250 MHz.KeywordsBayer CFAJointDemosaicDenoiseAlgorithmVLSI Implementation" @default.
- W805388699 created "2016-06-24" @default.
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- W805388699 date "2015-01-01" @default.
- W805388699 modified "2023-09-24" @default.
- W805388699 title "Low Complexity Algorithm and VLSI Design of Joint Demosaicing and Denoising for Digital Still Camera" @default.
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- W805388699 doi "https://doi.org/10.1007/978-3-662-45815-0_10" @default.
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