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- W818536952 abstract "Xilinx Virtex II Pro FPGA with integrated PowerPC core offers an opportunity to implementing a software and hardware codesign. The software application executes on the PowerPC processor while the FPGA implementation of hardware cores coprocess with PowerPC to achieve the goals of acceleration. Another benefit of coprocessing with the hardware acceleration core is the release of processor load. This thesis demonstrates such an FPGA based software and hardware codesign by implementing a real time video processing project on Xilinx ML310 development platform which is featured with a Xilinx Virtex II Pro FPGA. The software part in this project performs video and memory interface task which includes image capture from camera, the store of image into on-board memory, and the display of image on a screen. The hardware coprocessing core does a contrast enhancement function on the input image. To ease the software development and make this project flexible for future extension, an Embedded Operating System MontaVista Linux is installed on the ML310 platform. Thus the software video interface application is developed using Linux programming method, for example the use of Video4Linux API. The last but not the least implementation topic is the software and hardware interface, which is the Linux device driver for the hardware core. This thesis report presents all the above topics of Operating System installation, video interface software development, contrast enhancement hardware implementation, and hardware core’s Linux device driver programming. After this, a measurement result is presented to show the performance of hardware acceleration and processor load reduction, by comparing to the results from a software implementation of the same contrast enhancement function. This is followed by a discussion chapter, including the performance analysis, current design’s limitations and proposals for improvements. This report is ended with an outlook from this master thesis." @default.
- W818536952 created "2016-06-24" @default.
- W818536952 creator A5055741727 @default.
- W818536952 date "2006-01-01" @default.
- W818536952 modified "2023-09-27" @default.
- W818536952 title "An FPGA Based Software/Hardware Codesign for Real Time Video Processing : A Video Interface Software and Contrast Enhancement Hardware Codesign Implementation using Xilinx Virtex II Pro FPGA" @default.
- W818536952 hasPublicationYear "2006" @default.
- W818536952 type Work @default.
- W818536952 sameAs 818536952 @default.
- W818536952 citedByCount "1" @default.
- W818536952 crossrefType "journal-article" @default.
- W818536952 hasAuthorship W818536952A5055741727 @default.
- W818536952 hasConcept C111919701 @default.
- W818536952 hasConcept C113843644 @default.
- W818536952 hasConcept C129307140 @default.
- W818536952 hasConcept C13164978 @default.
- W818536952 hasConcept C149635348 @default.
- W818536952 hasConcept C157915830 @default.
- W818536952 hasConcept C2777674469 @default.
- W818536952 hasConcept C2777904410 @default.
- W818536952 hasConcept C41008148 @default.
- W818536952 hasConcept C42935608 @default.
- W818536952 hasConcept C56005371 @default.
- W818536952 hasConcept C65232700 @default.
- W818536952 hasConcept C9390403 @default.
- W818536952 hasConcept C99613125 @default.
- W818536952 hasConceptScore W818536952C111919701 @default.
- W818536952 hasConceptScore W818536952C113843644 @default.
- W818536952 hasConceptScore W818536952C129307140 @default.
- W818536952 hasConceptScore W818536952C13164978 @default.
- W818536952 hasConceptScore W818536952C149635348 @default.
- W818536952 hasConceptScore W818536952C157915830 @default.
- W818536952 hasConceptScore W818536952C2777674469 @default.
- W818536952 hasConceptScore W818536952C2777904410 @default.
- W818536952 hasConceptScore W818536952C41008148 @default.
- W818536952 hasConceptScore W818536952C42935608 @default.
- W818536952 hasConceptScore W818536952C56005371 @default.
- W818536952 hasConceptScore W818536952C65232700 @default.
- W818536952 hasConceptScore W818536952C9390403 @default.
- W818536952 hasConceptScore W818536952C99613125 @default.
- W818536952 hasLocation W8185369521 @default.
- W818536952 hasOpenAccess W818536952 @default.
- W818536952 hasPrimaryLocation W8185369521 @default.
- W818536952 hasRelatedWork W1494418630 @default.
- W818536952 hasRelatedWork W1583147446 @default.
- W818536952 hasRelatedWork W1599741160 @default.
- W818536952 hasRelatedWork W1836004068 @default.
- W818536952 hasRelatedWork W1969526290 @default.
- W818536952 hasRelatedWork W1994855639 @default.
- W818536952 hasRelatedWork W1997570791 @default.
- W818536952 hasRelatedWork W2025063675 @default.
- W818536952 hasRelatedWork W2091324755 @default.
- W818536952 hasRelatedWork W2108424055 @default.
- W818536952 hasRelatedWork W2153572010 @default.
- W818536952 hasRelatedWork W2153765435 @default.
- W818536952 hasRelatedWork W2154749008 @default.
- W818536952 hasRelatedWork W2156000918 @default.
- W818536952 hasRelatedWork W2377781984 @default.
- W818536952 hasRelatedWork W2516681293 @default.
- W818536952 hasRelatedWork W2525015810 @default.
- W818536952 hasRelatedWork W3214228838 @default.
- W818536952 hasRelatedWork W434746025 @default.
- W818536952 hasRelatedWork W2560293786 @default.
- W818536952 isParatext "false" @default.
- W818536952 isRetracted "false" @default.
- W818536952 magId "818536952" @default.
- W818536952 workType "article" @default.