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• W820241123 abstract "Abstract This paper highlights that cycling-induced threshold-voltage instabilities in nanoscale NAND Flash technologies display a non-negligible dependence on the background pattern of the memory array during idle/bake periods. Experimental results clearly reveal, in fact, that instabilities in a (victim) cell do not depend only on its memory state, but also on the memory state of its first neighboring (aggressor) cells. The magnitude of this new cell-to-cell interference effect, moreover, appears to depend on the memory state of the victim cell, decreasing with the increase of its threshold-voltage level. From all of the gathered experimental evidence a physical picture explaining the phenomenon is provided, which is, finally, confirmed with the help of numerical simulations." @default.
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• W820241123 date "2015-11-01" @default.
• W820241123 modified "2023-10-03" @default.
• W820241123 title "Impact of the array background pattern on cycling-induced threshold-voltage instabilities in nanoscale NAND Flash memories" @default.
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• W820241123 doi "https://doi.org/10.1016/j.sse.2015.05.025" @default.
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