Matches in SemOpenAlex for { <https://semopenalex.org/work/W82740653> ?p ?o ?g. }
Showing items 1 to 73 of
73
with 100 items per page.
- W82740653 abstract "Several yield and reliability enhancement techniques have been proposed for the compaction, routing and technology mapping stages of VLSI design. For yield, we modify the existing layouts to reduce the sensitivity of the design to random point defects, which are the main yield detractors in today's IC technology. For reliability, we deal with several important failure mechanisms including electromigration, antenna effect, crosstalk noise and hot-carrier effect.At the layout compaction stage, new techniques for yield enhancement are presented and the yield improvement results on some industrial examples are shown. These new techniques take 2D connections into consideration when performing 1D compaction and they consider the problem of data volume control when dealing with hierarchical design. For this stage of the VLSI layout design, we also propose a minimum layout perturbation compaction algorithm for electromigration reliability enhancement. This algorithm can increase the width of the wires which have electromigration reliability problems and resolve the design rule violations introduced by the wire widening process with minimum changes to the layout so that the previously achieved layout optimization goals such as area, performance and yield can be preserved as much as possible.At the routing stage, a layer reassignment algorithm is presented for yield enhancement for 2-layer channel routing. This layer reassignment approach is then extended to antenna effect minimization during the 3-layer routing process. We also develope an algorithm which combines layer reassignment, track reassignment and dogleg insertion to reduce the crosstalk noise in routing.For the technology mapping stage, a logic level hot-carrier effect model is presented. Based on this model a mapping algorithm which targets hot-carrier effect is proposed and it is shown that a design with the lowest power measure, which has long been regarded as the rough measure of reliability, is not always the best design for reliability.Experimental results have shown that by applying the proposed techniques it is possible to achieve significant yield and reliability improvement during the layout and logic levels of VLSI design." @default.
- W82740653 created "2016-06-24" @default.
- W82740653 creator A5037378495 @default.
- W82740653 creator A5055210733 @default.
- W82740653 date "1998-01-01" @default.
- W82740653 modified "2023-09-24" @default.
- W82740653 title "Layout and logic techniques for yield and reliability enhancement" @default.
- W82740653 hasPublicationYear "1998" @default.
- W82740653 type Work @default.
- W82740653 sameAs 82740653 @default.
- W82740653 citedByCount "0" @default.
- W82740653 crossrefType "journal-article" @default.
- W82740653 hasAuthorship W82740653A5037378495 @default.
- W82740653 hasAuthorship W82740653A5055210733 @default.
- W82740653 hasConcept C119599485 @default.
- W82740653 hasConcept C121332964 @default.
- W82740653 hasConcept C127413603 @default.
- W82740653 hasConcept C138055206 @default.
- W82740653 hasConcept C14580979 @default.
- W82740653 hasConcept C146978453 @default.
- W82740653 hasConcept C163258240 @default.
- W82740653 hasConcept C188817802 @default.
- W82740653 hasConcept C190560348 @default.
- W82740653 hasConcept C200601418 @default.
- W82740653 hasConcept C24326235 @default.
- W82740653 hasConcept C2779754485 @default.
- W82740653 hasConcept C41008148 @default.
- W82740653 hasConcept C43214815 @default.
- W82740653 hasConcept C62520636 @default.
- W82740653 hasConcept C74172769 @default.
- W82740653 hasConceptScore W82740653C119599485 @default.
- W82740653 hasConceptScore W82740653C121332964 @default.
- W82740653 hasConceptScore W82740653C127413603 @default.
- W82740653 hasConceptScore W82740653C138055206 @default.
- W82740653 hasConceptScore W82740653C14580979 @default.
- W82740653 hasConceptScore W82740653C146978453 @default.
- W82740653 hasConceptScore W82740653C163258240 @default.
- W82740653 hasConceptScore W82740653C188817802 @default.
- W82740653 hasConceptScore W82740653C190560348 @default.
- W82740653 hasConceptScore W82740653C200601418 @default.
- W82740653 hasConceptScore W82740653C24326235 @default.
- W82740653 hasConceptScore W82740653C2779754485 @default.
- W82740653 hasConceptScore W82740653C41008148 @default.
- W82740653 hasConceptScore W82740653C43214815 @default.
- W82740653 hasConceptScore W82740653C62520636 @default.
- W82740653 hasConceptScore W82740653C74172769 @default.
- W82740653 hasLocation W827406531 @default.
- W82740653 hasOpenAccess W82740653 @default.
- W82740653 hasPrimaryLocation W827406531 @default.
- W82740653 hasRelatedWork W101555434 @default.
- W82740653 hasRelatedWork W1542680794 @default.
- W82740653 hasRelatedWork W1981167090 @default.
- W82740653 hasRelatedWork W1982377271 @default.
- W82740653 hasRelatedWork W2042575635 @default.
- W82740653 hasRelatedWork W2049967610 @default.
- W82740653 hasRelatedWork W2089790389 @default.
- W82740653 hasRelatedWork W2091495490 @default.
- W82740653 hasRelatedWork W2095251710 @default.
- W82740653 hasRelatedWork W2097711839 @default.
- W82740653 hasRelatedWork W2142350374 @default.
- W82740653 hasRelatedWork W2168937779 @default.
- W82740653 hasRelatedWork W2183375745 @default.
- W82740653 hasRelatedWork W2246439441 @default.
- W82740653 hasRelatedWork W2899057310 @default.
- W82740653 hasRelatedWork W2908734144 @default.
- W82740653 hasRelatedWork W3018759668 @default.
- W82740653 hasRelatedWork W3080284064 @default.
- W82740653 hasRelatedWork W579477931 @default.
- W82740653 hasRelatedWork W776302915 @default.
- W82740653 isParatext "false" @default.
- W82740653 isRetracted "false" @default.
- W82740653 magId "82740653" @default.
- W82740653 workType "article" @default.