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- W8482301 abstract "We present in this paper a fully integrated integer PLL synthesizer (including the VCO and the crystal oscillator) suitable for GPRS kind of application. The complete solution with the VCO integrated has been tested in the range (3 GHz to 3.7GHz) and also measurements @ 900MHz are presented using an external VCO. The chip has been processed in TI BiCMOS SiGe technology (45GHz ft) with 5 level of metal (the fifth metal in cupper). The complete PLL is 1.2mm 2 (fig.I.I) including the integrated and programmable filter and the integrated VCO. The overall current consumption is 15mA @ 2.7V supply (6mA for the PLL and 9mA for the VCO). The close in noise performances are the state of the art of the integrated pll -96.5dBc/Hz @ 1KHz offset with fout=900 MHz (external VCO) and fref=400KHz. The frequency range of the PLL (excluding the VCO) is up to 4.2 GHz. The settling time within 1KHz is <85us at fout=3.52GHz with -75dBc spurious @ 400KHz offset and -85dBc spurious @ 800KHz offset." @default.
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- W8482301 date "2002-01-01" @default.
- W8482301 modified "2023-09-27" @default.
- W8482301 title "Fully integrated low noise, high speed PLL for GPRS application" @default.
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