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- W85307716 abstract "This chapter presents two related 3-bit quantizations for the sum-product algorithm that are suitable for an adaptive decoder implementation using programmable logic. Our decoder design combines the parity-check and variable-node-update steps into a single computation. The hardware requirements are considered and compared to the published work of Planjery et al. Decoder performance in the waterfall region is obtained by simulation." @default.
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- W85307716 date "2012-09-06" @default.
- W85307716 modified "2023-09-24" @default.
- W85307716 title "Adaptive Three-Bit LDPC Decoder Quantization" @default.
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- W85307716 doi "https://doi.org/10.1007/978-94-007-4786-9_1" @default.
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