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• W9626367 abstract "Low-swing (<600mV) submicron BiCMOS circuits have many advantages over fullswing BiCMOS, CMOS, or small-swing bipolar circuits. We show that the optimal speed fan-in for low-swing BiCMOS logic circuits is generally in the range of 7 to 20, depending on the process characteristics and gate topology. This high fan-in means that the bipolar device parasitic capacitances primarily determine the circuit speed and speedpower products, instead of f as in the case of low fan-in mux/demux communication T circuits. SiGe HBT BiCMOS circuits are attractive for logic circuits not primarily for their higher f , but rather for their increased maximum device currents for a given T parasitic capacitance and for their smaller V , which can lower chip power dissipation. be Finally, for small-swing BiCMOS circuits to be competitive with CMOS they must also be built from the same lithography as CMOS circuits, have local interconnect for interdevice intra-gate wiring, and be built with a full-custom design methodology. Copyright  1994 Digital Equipment Corporation d i g i t a l Western Research Laboratory 250 University Avenue Palo Alto, California 94301 USA" @default.
• W9626367 created "2016-06-24" @default.
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• W9626367 date "1999-01-01" @default.
• W9626367 modified "2023-09-27" @default.
• W9626367 title "Circuit and Process Directions for Low-Voltage Swing Submicron BiCMOS" @default.
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• W9626367 hasPublicationYear "1999" @default.
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