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• W96334619 abstract "As the design rule is scaled down, the electrical isolation of metal lines becomes critical. In a high density flash memory with 37nm (pitch=74nm) technology, the threshold voltage shift of ∼0.3V is found to be caused by tungsten micro-bridge between adjacent bit-lines. Simulations and experimental data showed that tungsten re-sputtering is occurred during the deposition of HDP (High Density Plasma)-SiO2 used as the filling dielectric between tungsten bit-lines. In this paper, the model for the tungsten re-sputtering is presented. The plasma simulations are performed to investigate the effects of process factors of HDP-SiO2 deposition on the formation of micro-bridge using in-house tool, PIE simulator." @default.
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• W96334619 date "2007-11-17" @default.
• W96334619 modified "2023-09-23" @default.
• W96334619 title "Modeling of Re-Sputtering Induced Bridge of Tungsten Bit-Lines for NAND Flash Memory Cell with 37nm Node Technology" @default.
• W96334619 cites W2162027152 @default.
• W96334619 doi "https://doi.org/10.1007/978-3-211-72861-1_11" @default.
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